Web lists-archives.com

Re: [Mingw-users] msvcrt printf bug




Hi KHMan,

Excellent explanations, thx!

I agree it would be cool to see to what extent GPU computations are 
actually consistent with FPU's (I'd bet not really: it's a relatively 
new thing), but we so far didn't find a usage for GPUs for our purposes 
anyway (one day, maybe?).

Best,

Emanuel

On 21-Jan-17 01:54, KHMan wrote:
> On 1/21/2017 6:18 AM, mingw.mbourne@xxxxxxxxxxxxxxx wrote:
>> Peter Rockett wrote:
>>> Guys
>>>
>>> At the risk of wading into a thread that has become very heated,
>>> could I drag this back to technical matters.
>> With similar trepidation...
>>
>>> I think everybody (apart maybe from the OP) agrees how floating point
>>> numbers behave. Keith makes a good point about rounding. Can I toss
>>> in another feature that changing the compiler optimisation level
>>> often reorders instructions meaning that rounding errors accumulate
>>> in different ways. So changing the optimisation level often slightly
>>> changes the numerical answers. :-\
>> Another aspect which I think has been mentioned in passing a couple of
>> times, but not expanded on, is that how the processor's floating-point
>> registers are utilised can also have an effect. These registers are
>> typically higher precision than the in-memory representation of floats,
>> so can store intermediate results more accurately, but there are a
>> limited number of them - so sometimes some intermediate results have to
>> be written out to memory (at reduced precision) and read back later.
>> [snip snip]
> AFAIK it is only with 8087 registers -- just about the only
> company who did this was Intel. Didn't really worked out, I think
> everybody else quickly stuck with 64-bit registers. One thing is
> that register spills would store values at 64-bit into memory, so
> your application's results could change when it is compiled into
> different register allocations. With 64-bit regularity, managing
> errors and such shifts to the responsibility of apps.
>
> Any modern 64-bit x86 app would be using SSE2, and have 64 bit FPU
> registers in line with other CPUs and GPUs. That simplifies things
> a lot. But GPUs might not be fully IEEE compliant as in they might
> not handle denormals etc. I don't know what are the
> reproducibility expectations for CPUs versus GPUs these days.
>
> One newish thing that can change results versus regular FPU code
> is FMA3. I would be interested in any views, Wikipedia is a bit
> thin on its FMA3 page and I have been too lazy to read (and/or
> reread) the Intel/AMD arch manuals...
>


------------------------------------------------------------------------------
Check out the vibrant tech community on one of the world's most
engaging tech sites, SlashDot.org! http://sdm.link/slashdot
_______________________________________________
MinGW-users mailing list
MinGW-users@xxxxxxxxxxxxxxxxxxxxx

This list observes the Etiquette found at 
http://www.mingw.org/Mailing_Lists.
We ask that you be polite and do the same.  Disregard for the list etiquette may cause your account to be moderated.

_______________________________________________
You may change your MinGW Account Options or unsubscribe at:
https://lists.sourceforge.net/lists/listinfo/mingw-users
Also: mailto:mingw-users-request@xxxxxxxxxxxxxxxxxxxxx?subject=unsubscribe