Re: [PATCH REPOST v8 3/3] i2c-ocores: sifive: add polling mode workaround for FU540-C000 SoC.
- Date: Fri, 31 May 2019 20:52:19 +0200
- From: Andrew Lunn <andrew@xxxxxxx>
- Subject: Re: [PATCH REPOST v8 3/3] i2c-ocores: sifive: add polling mode workaround for FU540-C000 SoC.
On Sat, Jun 01, 2019 at 12:00:23AM +0530, Sagar Shrikant Kadam wrote:
> The i2c-ocore driver already has a polling mode interface.But it needs
> a workaround for FU540 Chipset on HiFive unleashed board (RevA00).
> There is an erratum in FU540 chip that prevents interrupt driven i2c
> transfers from working, and also the I2C controller's interrupt bit
> cannot be cleared if set, due to this the existing i2c polling mode
> interface added in mainline earlier doesn't work, and CPU stall's
> infinitely, when-ever i2c transfer is initiated.
> commit dd7dbf0eb090 ("i2c: ocores: refactor setup for polling")
> The workaround / fix under OCORES_FLAG_BROKEN_IRQ is particularly for
> FU540-COOO SoC.
> The polling function identifies a SiFive device based on the device node
> and enables the workaround.
> Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@xxxxxxxxxx>
> Acked-by: Andrew Lunn <andrew@xxxxxxx>