Re: [PATCH RFC 1/2] perf/x86/intel: make reusable LBR initialization code
- Date: Wed, 6 Dec 2017 13:51:14 +0100
- From: Peter Zijlstra <peterz@xxxxxxxxxxxxx>
- Subject: Re: [PATCH RFC 1/2] perf/x86/intel: make reusable LBR initialization code
On Wed, Dec 06, 2017 at 02:43:02PM +0300, Jan Dakinevich wrote:
> This patch introduces globally visible intel_pmu_lbr_fill() routine,
> which gathers information which LBR MSRs are support for specific CPU
> It is supposed that the routine would be used in KVM code, using guest
> CPU information as an input. By this reason, it should not have any side
> effect which could affect host system.
> * LBR information moved to separate structure `struct x86_pmu_lbr';
> * All family-specific tweaks on gathered information are applied only
> for global x86_pmu.lbr to keep current perf initialization behavior.
> Signed-off-by: Jan Dakinevich <jan.dakinevich@xxxxxxxxxxxxx>
Hurch, that's a lot of churn. Nothing bad stood out though.